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Working Groups: Overview
 Camera Working Group
Camera WG was formed by the MIPISM Board of Directors to enable industry convergence onto a robust, scalable, power efficient serial interface for imaging peripherals and host processors.
CWG worked actively on a major revision to the legacy MIPI Camera Serial Interface 1.0 specification in 2004 and 2005, with strong participation from a diverse set of member companies. This effort generated the "Camera Serial Interface 2 v1.0" specification, released to MIPI Adopter companies in December 2005.
CSI-2 provides the details of protocol transmission over a D-PHY physical layer, defined by the MIPI PHY WG in a separate specification. Currently, the scope of CSI-2 is transmission of serial data from a peripheral to a host processor in scope, including packet formatting, data formats, and error detection and correction. Command and control issues are currently out of scope, since they are so varied across implementations from different manufacturers and in different OEM software.
The group now meets on a less frequent basis to support CSI-2 specification maintenance and to support questions about spec interpretation and implementation issues.
Device Descriptor Block Working Group
The charter of the DDB working group is to define a high level protocol to extract information from devices attached to any MIPI bus in a standard way. This information might be device identification (e.g. manufacturer and model), device capabilities (such as display row and column size in pixels) or even individual instance data such as the frequency response curve of a microphone or speaker. Such information may enable flexible control software that can deal with multiple device configurations by dynamically examining the actual system configuration and adapting itself to this configuration.
The DDB working group will develop a standard for this protocol and may, in close cooperation with other MIPI working groups, develop additional standard(s) that define the information that can be extracted using the protocol. Furthermore, the working group will propose a process for maintaining and extending these information standard(s). As the DDB working group was only formed in early 2006, no standards have been defined yet. Use cases have been described and the working group is busy defining the exact requirements in close collaboration with other MIPI working groups. Some preliminary technical solutions have also been proposed.
DigRFSM
The DigRFSM WG was formed as a working group in April 2007. The group is focused on developing specifications for wireless mobile RFIC to BBIC interfaces in mobile devices.
The group's current charter is split into short and long term development efforts. The short term development will focus on a specification targeted for completion by end of 2007 for LTE and WiMax air interface standards. The longer term development will focus on future air interface standards which promise further improvements in high speed, data optimized traffic. In addition, the future work will seek to harmonize efforts with the PHY and UniPro Working Groups.
These specifications will describe the logical, electrical and timing characteristics of the digital RF-BB Interface with sufficient detail to allow physical implementation of the interface, and with sufficient rigor that implementations of the interface from different suppliers are fully compatible at the physical level.
Please read the following IMPORTANT NOTICE before selecting the link to view the DigRF BASEBAND/RF DIGITAL INTERFACE SPECIFICATION Version 1.12: IMPORTANT NOTICE
Display Working Group
The Display Working Group was formed to develop specifications for processor-to-display interconnect on handheld platforms. Such specifications should:
- meet all functional and reliability requirements using less power than existing solutions
- enable scalable high performance for higher-resolution LCD panels
- substantially reduce pincount compared to legacy parallel interfaces
- meet all requirements above at equivalent or lower cost compared to legacy parallel interfaces
- offer a market lifetime lasting through several generations of mobile display
The Display Working Group first developed and approved a pair of specs - DBI-2 and DPI-2 - that offer standardized and updated versions of "legacy" parallel interfaces for "Command Mode" and "Video Mode" architecture display panels, respectively. The WG then developed two new specifications, Display Serial Interface (DSI) and Display Command Set (DCS), which were approved by the MIPI Board in early 2006. DSI specifies a packet-based protocol layered above D-PHY, the MIPI physical-layer specification from the PHY Working Group. At the application level above DSI, DCS specifies an industry-standard command set for displays with on-panel controllers and frame buffers. In July 2006, DWG finished work on several updates and minor changes to DSI.
Press Release Announcing DSI Approval
High-Speed Synchronous Interface Working Group
MIPI High Speed Synchronous Interface (HSI) is one of the Legacy Specifications MIPI issued several months after its creation in 2003. The HSI 1.0 interface is widely used in a variety of products as a Baseband-Application processor link.
The purpose of the HSI group is to manage enhancements to the existing specification, improving it while maintaining backward compatibility. A new spec release is expected at the beginning of 2007.
Interface Management Framework Working Group
The Interface Management Framework Working Group was established by the MIPI Alliance in June 2007. Issued from Software WG investigations, the group is chartered to specify APIs of a unified software framework managing MIPI Alliance hardware interfaces.
The IMF aim to be integrated into the lowest level of Operating System driver frameworks to enable OSes to take full advantage of MIPI Alliance innovative peripheral interfacing technologies. The IMF will also present to the OS a unified model of peripherals management facilitating the migration of peripherals across hardware interfaces. The discovery part of the framework will be based on the DDB WG protocol.
The WG plan to output OS-independent APIs modeled in UML, or UML-like language, as well as derivative APIs mapping the generic model to a set of selected Operating Systems.
Low-Speed Multipoint Link Working Group
The charter for the LML WG tasks the group to develop a very low pin count and low cost communications interface that has the potential to consolidate the numerous low speed audio and control interfaces found in today's portable handheld devices. Targeting replacement of I2C, SPI, microWire, and UART combined with various flavors of I2S, PCM, AC-97 and SPDIF audio interfaces on one link, the flexible boundary of control and isochronous data bandwidth can dynamically adapt to changing use cases. The specification under development, called Serial Low-power Inter-chip Media Bus (SLIMbusSM), includes a two-wire, low voltage CMOS physical layer with a time division multiplexed link layer as a foundation for a set of messages and data channels. Messages are defined for bus and channel management, and are extensible into sets called Device Classes. Simple Device Classes are included for a host, clock generation (called a Framer), bus management (called the Interface), and a set of core messages necessary for future application-level Device Classes. SLIMbus will not address these application-level Device Classes in the initial version of the Specification. The current schedule targets 4Q06 to forward the SLIMbus Specification out of the WG to the MIPI Board of Directors.
Press release announcing SLIMbusSM specification
NAND Software Working Group
The NAND Software Working Group was established by the MIPI Alliance to investigate software interface standardization which may ease integration of NAND products into SW platforms. The group includes leading NAND flash memory manufacturers.
The Working Group will focus state-of-the-art software architectures comprising embedded NAND-like Flash storage management and anticipating NAND flash trends. The group intends to develop specifications standardizing the SW interfaces between the identified architecture components that would be under the responsibility of NAND flash manufacturer and produce complementary documentation to promote and aid the use of this interface.
The architecture and interfaces defined by the NAND SW Working Group target compatibility with existing and future operating system architectures.
Physical Layer Working Group
The PHY Working Group is chartered to specify high-speed physical layer designs to support multiple application requirements. The first specification developed by the PHY WG was targeted primarily to support the requirements of camera and display applications. The resulting standard, D-PHY, is a low-power, differential signaling solution with a dedicated clock lane and one or more (scalable) data lanes. In addition to supporting MIPI CSI-2 and DSI standards, D-PHY will also support MIPI’s emerging UniPro specification. To support longer term requirements for more advanced applications, the PHY WG has begun preliminary development of a higher speed, embedded clock design, called M-PHY.
Software Working Group
The Software WG is a group of software experts responsible for software-related activities within MIPI. This WG is actively collaborating with all MIPI working groups to ensure successful integration of the MIPI interface into software platforms and encourage compatibility between working groups in terms of software usage.
The Software WG is also active in the software sub-groups of other MIPI WGs and reviews proposals for new MIPI Working Groups which may develop software specifications related to MIPI Interfaces.
System Power Management Working Group
The System Power Management (SPM) Working Group is developing standard power control interfaces for mobile systems. These interfaces may impact both hardware and software domains. In the hardware domain, a System Power Management Interface (SPMI) specification is being developed for systems with multiple masters and slaves. The SPMI protocol replaces several existing buses to minimize component pin count. In the software domain, a standard software interface is being considered to enable operating systems and software applications to more effectively control the power state of hardware components or sub-modules in a system. A white paper is available which describes these interfaces within the context of a typical system.
SPM White Paper (.pdf)
Test & Debug Working Group
The MIPI Test & Debug Working Group was established to enable the best test and debug support in all stages of mobile chip and equipment development. The specifications target hardware and software interfaces between systems-on-a-chip (SoC) and tools supporting test and debug. Key objectives of these standards are enabling low cost solutions and improving interoperability of hardware and software. To WG cooperates with other industry and standardization bodies to ensure alignment with related standards and technologies.
UniPro Working Group
The MIPI Alliance Standard for UniPro (Unified Protocol) defines a layered protocol for interconnecting devices and components within mobile systems such as cellular telephones, handheld computers, digital cameras, etc. UniPro allows these devices and components to exchange data at high data rates, at low pin counts and at low energy per transferred bit. A suite of general-purpose features aims to make UniPro applicable for a wide range of component types ( e.g. application processors, coprocessors, modems, peripherals) and different types of data traffic (e.g., control messages, bulk data transfer, packetized streaming).
The UniPro WG is currently developing the UniPro 1 point-to-point specification as well as the PIE (Processor Interface Emulation) specifications. Future developments in the UniPro WG will target support for a network of devices, including UniPro 1 endpoints.
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