MIPI I3C Basic Transforms Sensor-Proliferation Challenges into Opportunities

1. I3C Basic and v1.0 provide significant benefits over I²C, but there are differences.

About MIPI I3C and I3C Basic

Implemented on a standard CMOS I/O using two wires, I3C incorporates, consolidates, and advances specifications such as Inter-Integrated Circuit (I²C), System Management Bus (SMBus), Universal Asynchronous Receiver/Transmitter (UART), and Serial Peripheral Interface (SPI).

As a result, MIPI I3C Basic and I3C provide designers and developers with a single, standardized way to accommodate the proliferation of both sensors and interfaces. Both specifications are designed for use in IoT devices such as drones, connected/autonomous/semi-autonomous vehicles, medical instruments, and industrial equipment, as well as smartphones and virtual/augmented-reality headsets.

Most types of I²C devices can coexist with I3C devices on the same bus, enabling the migration of legacy I²C designs to the new specification. At the same time, newly designed I3C devices can work on existing I²C buses. Figure 2 summarizes several key benefits of I3C.

2. Prior to I3C (right), a host often required different interfaces to have features like interrupt support.

MIPI I3C and I3C Basic also provide significant advantages in terms of performance and simplicity. For example, it has a multi-drop bus that, at 12.5 MHz, is over 12 times faster than what I²C supports while using significantly less power. I3C provides features like in-band interrupt support, dynamic addressing, multi-master support, standardized commands, time control, hot-join support, plus error detection and recovery.

Several I3C features help system designers minimize the cost and size of their IoT devices. For example, in-band interrupts enable slaves to notify masters of interrupts, a design that eliminates the need for a separate general-purpose input/output (GPIO) for each slave, thus reducing system cost and complexity. Dynamic address assignments help minimize pin counts, which is key for accommodating space-constrained form factors. MIPI I3C also uses standard, low-cost pads and requires minimal cost in logic to support.

Compared to other common interfaces, I3C and I3C Basic provide significant advantages in terms of reduced complexity, higher performance, lower power consumption, and more. For example, SPI requires four wires, plus one chip select (or enable) wire for each additional device on the bus. MIPI I3C does all that with just two wires. Fewer pins and wires minimize an IoT device’s complexity, cost, and power consumption. In the case of a fitness tracker, for instance, I3C helps system designers meet consumer preferences for svelte form factors and batteries that don’t have to be charged every night.

These attributes often are just as important when the IoT device is embedded in another product that’s large, much more expensive, or both. One example is a car, where automakers scrutinize the size and cost of every component—including the image sensors for detecting lanes, pedestrians and other vehicles.

Common Implementation Questions

MIPI’s Frequently Asked Questions (FAQ) for MIPI I3C® v1.0 and I3C Basic^SM v1.0 is well-suited for system designers and software developers who want to get up to speed quickly. Here are a few examples:

• The maximum per-device capacitance on SCL and SDA is 5 pF, although ideally most or all devices will be well below that. Note that capacitance alone is insufficient to determine maximum frequency on the I3C bus. It’s also important to consider maximum propagation length, effect of stubs, and internal clock-to-data (tSCO) of the slaves. 
• Companion MIPI I3C/I3C Basic specifications will also help enable software development. For example, the MIPI Specification for I3C Host Controller Interface (MIPI I3C HCI) v1.0 defines a common set of capabilities for the I3C host controller and its software interface to the system. Further, the MIPI DisCo specification for I3C v1.0 (MIPI DisCo for I3C), currently in development, will be used with the MIPI Specification for Discovery and Configuration (DisCo) v1.0 to eliminate the need to rewrite or update drivers for every I3C device, platform, and operating system. For ASIC hardware developers, system designers, and others working on the more deeply embedded I3C devices, another helpful resource is the Application Note for I3C v1.0 and I3C Basic v1.0.
• The maximum wire length for I3C communication is a function of speed because all of the reflections and bus turnaround must complete within one cycle. For example, suppose the master and slave are one meter apart. The maximum effective read speed would be around 6 MHz to allow for clock propagation time to slave and SDA return time to master.
• I²C repeaters cannot be used for I3C because the latter’s bus works with push-pull modes (in addition to the open drain for some transfers). Another reason is that I3C is much faster. Most repeaters are quite limited in speed because of the lag effect of changing states on SCL and SDA, due to both series-resistance and assumptions about open-drain.
• The I3C subsystem has been added to the Linux kernel.
• I²C devices won’t respond to I3C commands because the dynamic address assigned to I3C devices wouldn’t overlap the I²C static addresses. As a result, they wouldn’t respond to any I3C address even if they could see it.

Example Use Cases: Automotive

Today’s connected vehicles and tomorrow’s autonomous/semi-autonomous vehicles are essentially rolling collections of dozens of IoT systems. Figure 3 illustrates some examples of how MIPI I3C and MIPI I3C Basic enable these systems.

3. MIPI I3C and MIPI I3C Basic can enable today’s connected vehicles and tomorrow’s autonomous/semi-autonomous vehicles.

The use of I3C and I3C Basic in automotive presents opportunities for sensor data transport and control/manageability. Sensing in automobiles is typically achieved via a module-based architecture where the physical sensor itself, such as an inertial measurement unit (IMU) is co-located with an electronic control unit (ECU)/microcontroller. In this architecture, MIPI I3C is an ideal interface for reliable, low-latency, and low-cost connectivity between the module’s sensor and its ECU.

In some automotive applications, such as imaging, the sensor requires data rates much higher than that of MIPI I3C. MIPI I3C can instead be used for control/management of the sensor, while a higher-speed MIPI CSI-2-based interface can be employed to transport data. Here, two MIPI interfaces work collaboratively to provide a reliable and managed data link.

Beyond Sensing—System Manageability

The usefulness of I3C and I3C Basic extends beyond sensing. Figure 4 shows an emerging use case where MIPI I3C can be used to manage complex systems when a common management transport protocol is adopted. A move to MIPI I3C here can drastically reduce cost and latency throughout such complex systems while also inspiring new capabilities.

4. Shown is an emerging use case where MIPI I3C can be used to manage complex systems when adopting a common management transport protocol.

Other MIPI Specifications

The innovative capabilities of MIPI I3C and I3C Basic have inspired numerous collaborations with other MIPI working groups, addressing even more use cases by combining with other MIPI specifications. Figure 5 illustrates the examples of camera control in MIPI CSI-2, data transport of processed and raw touch data, and closed chassis system debug with minimum boundary pin count.

5. Examples of collaborations include camera control in MIPI CSI-2, data transport of processed and raw touch data, and closed chassis system debug with minimum boundary pin count.

MIPI Alliance is continually adding features to its specifications so they stay ahead of industry trends and market needs. New versions of MIPI I3C and I3C Basic will debut later this year. Updates and more resources may be found here.

Ken Foust, a Principal Engineer at Intel, is chair of the MIPI I3C Basic Ad Hoc Working Group and chair of the MIPI Sensor Working Group.