---
title: Join Us Next Week for an Exploration of CSI-2 System Design
description: MIPI's Camera Week webinar series on 27-29 November will feature three webinars focused on imaging system design considerations with MIPI CSI-2.
---

[MIPI Alliance Blog ](https://www.mipi.org/blog)

# [Join Us Next Week for an Exploration of CSI-2 System Design](https://www.mipi.org/blog/join-us-next-week-for-an-exploration-of-csi-2-system-design-considerations)

 Written by [Dervla O'Reilly, MIPI Senior Event Manager](https://www.mipi.org/blog/author/dervla-oreilly-mipi-senior-event-manager) | 22 November 2023

You're invited to join us on **27-29 November** for MIPI's [Camera Week webinar series](https://www.mipi.org/knowledge-library/webinars/mipi-camera-week-exploring-csi-2-over-d-phy-and-c-phy-imaging-system-designs)–two webinars exploring the system architecture implications of using [MIPI CSI‑2®](https://www.mipi.org/specifications/csi-2) over[ C‑PHY℠](https://www.mipi.org/specifications/c-phy) and [D‑PHY℠,](https://www.mipi.org/specifications/d-phy) and a member use case on how CSI-2 can deliver optimum image quality in notebook products.

Led by developers and implementers of CSI-2, D-PHY and C-PHY, this webinar series offers the opportunity to dive deeper into CSI-2 features and PHY-specific system considerations, engage with experts through live Q&A sessions, and gain insights from a real-world implementation experience.

Save your spot at all three webinars with a one-time registration.

 

### MIPI CSI-2 Over D-PHY

The week kicks off on Monday, 27 November (8-9 a.m. PST), with "[An Exploration of MIPI CSI‑2 over D‑PHY Imaging System Design Considerations](https://www.mipi.org/knowledge-library/webinars/mipi-camera-week-exploring-csi-2-over-d-phy-and-c-phy-imaging-system-designs#d-phy)," presented by **Haran Thanigasalam**, MIPI camera and imaging consultant, and **Raj Kumar Nagpal**, chair of the MIPI D-PHY Working Group.

 

The presentation will provide an overview of key CSI-2 features, including Latency Reduction and Transport Efficiency (LTRE), Scrambling, Unified Serial Link (USL), Differential Pulse Code Modulation (DPCM), and Multi-Pixel Compression (MPC). It will also explore CSI-2 over D-PHY imaging system design considerations, with focus on support for higher channel rates, SoC port/pin optimization and lower RF emissions. In addition, presenters will address design considerations in conjunction with upcoming D-PHY developments, including the continued introduction of an embedded clock option.

 

### MIPI CSI-2 Over C-PHY

On Wednesday, 29 November, 8-9 a.m. (PST), Haran will be joined by **George Wiley**, chair of the C-PHY Working Group, for "[An Exploration of MIPI CSI-2 over C-PHY Imaging System Design Considerations](https://www.mipi.org/knowledge-library/webinars/mipi-camera-week-exploring-csi-2-over-d-phy-and-c-phy-imaging-system-designs#c-phy)." This webinar will also look at CSI-2 features, in this case, the “Always On Sentinel Conduit” for ultra-low power vision inferencing and “Smart Region Of Interest” to enable smarter image sensors. Following a closer look at both current and forward-looking CSI-2 over C-PHY imaging system design considerations, with a focus on support for higher channel rates and SoC port/pin optimization, the presenters will discuss upcoming C-PHY developments such as the introduction of a new multi-phase coding scheme.

 

### Use Case: Camera Image Quality

Also on Wednesday, 29 November, 5 p.m. (PST) (10 a.m. (JST) on 30 November), MIPI will welcome **Xueyong Yang**, hardware engineer in system design strategy at Lenovo Japan, for his presentation on "[Delivering the Best Camera Image Quality Using MIPI Interfaces on ThinkPad Notebook](https://www.mipi.org/knowledge-library/webinars/mipi-camera-week-exploring-csi-2-over-d-phy-and-c-phy-imaging-system-designs#use-case)." Xueyong will discuss Lenovo's approach to providing customers with a “best-in-class” video conference experience in a notebook environment by utilizing MIPI camera interfaces combined with powerful image signal processing capabilities integrated into a SoC.

[View full post](https://www.mipi.org/blog/join-us-next-week-for-an-exploration-of-csi-2-system-design-considerations)

```json
{
  "@context" : "http://schema.org",
  "@type" : "BlogPosting",
  "author" : {
    "@type" : "Person",
    "name" : "Dervla O'Reilly, MIPI Senior Event Manager"
  },
  "dateModified" : "2023-11-22T15:45:00.762Z",
  "datePublished" : "2023-11-22T15:45:00Z",
  "headline" : "Join Us Next Week for an Exploration of CSI-2 System Design",
  "image" : {
    "@type" : "ImageObject",
    "height" : 706,
    "url" : "https://2384176.fs1.hubspotusercontent-na1.net/hubfs/2384176/Camera-Week-CTA-with-header.png",
    "width" : 1200
  },
  "mainEntityOfPage" : "https://www.mipi.org/blog/join-us-next-week-for-an-exploration-of-csi-2-system-design-considerations",
  "publisher" : {
    "@type" : "Organization",
    "logo" : {
      "@type" : "ImageObject",
      "height" : 60,
      "url" : "/hs/hsstatic/content_shared_assets/static-1.4092/img/default-amp-logo.png",
      "width" : 60
    },
    "name" : "MIPI Alliance Blog"
  }
}
```