Emulation of DUT using UniPro RMMI as a Standard Interface (Western Digital)

Speakers: 
VLSI/FPGA Engineer
Western Digital
5:15 PM

Abstract: By using RMMI interface as the standard Interface we can do 100% functional validation when compared with functional verification. By using this technique the dependency on physical layers can be by-passed during initial stages of RTL or FW development. The only challenge here is to develop simple hardware connecting parallel lines of Host to DUT for RMMI interface. This method can be used to run regression’s on Emulation platform which will corner all the DUT RTL and DUT FW issue’s prior to RTL/ROM code freeze. When we run this kind of Emulation platform parallel to Simulation environment it will be an added advantage in identifying critical/corner issue which cannot be covered in Verification flow sometimes. By the time Physical Layer (Analog Block) is stable for Integration we can make sure Digital Block is also ready for RTL freeze. Finally by implementing this idea we can see few bugs in advance.

Sreekanth Varma Dantuluri has been a VLSI/FPGA Engineer at Western Digital since 2014. He received his master’s degree in VLSI from IIIT in 2008. He has been actively participating in MIPI discussion’s and working on MIPI-based solutions for the past 3 years. He is very energetic in debugging MIPI UniPro and MIPI M-PHY related issues.