MIPI I3C High Data Rate Modes – How to Speed up Design Verification (Cadence)

Principal Solution Engineer
Cadence Design Systems
11:15 AM

Abstract: The MIPI Alliance I3C standardized sensor interface provides a number of significant advantages over existing digital sensor interfaces. This paper will briefly present I3C interface basics and will focus on various verification aspects of I3C High Data Rate modes through an advanced verification methodology based on coverage driven verification and real-life scenarios.

Steve (CY) Wang is a Solution Engineer at Cadence Design Systems, Inc. He works on MIPI VIPs, helps customers to deploy VIPs in their projects. Before Joining Cadence, Steve held lead project verification positions, across many companies, Realtek, Broadcom and Mediatek. He has covered a wide spectrum, including hardware emulation, verification planning and management, constraint-random verification. He received a M.S in Electrical Engineer from University of Southern California.