The MIPI Debug & Trace Connector Recommendations white paper, updated in July 2021, provides recommendations for board-level mating connectors to enable debug interfaces via new communication interfaces and protocols (such as IEEE 1149.7 and MIPI I3C) while maintaining backward compatibility with legacy technologies. The document also provides recommendations for connectors to enable MIPI Parallel Trace Interface (MIPI PTI℠) via high-speed parallel interfaces.
Specific recommendations are provided for:
- low-cost connector configurations that support basic debug and minimal trace
- a legacy connector that supports basic debug and a single trace channel
- a high-performance connector that supports basic debug and up to four independent trace channels
This latest version of the paper, v1.20, adds support for MIPI I3C® and MIPI I3C Basic℠. This was done following the addition of the Debug for I3C℠ specification to the family of MIPI Debug and Trace specifications and provides implementors with options to use IEEE 1149.1 legacy JTAG, IEEE 1149.7 JTAG in two-pin mode, and I3C in the already-defined pin mappings. Based on input from the developer community, the paper also defines a new 20-pin “JTAG plus trace” connector configuration.