See MIPI Alliance at the Linley Fall Processor Conference 2018.
The Linley Fall Processor Conference will be held on October 31 - November 1, 2018 at the Hyatt Regency Hotel, Santa Clara, CA. This two-day, partially dual-track conference features technical presentations addressing processors for communications, IoT, servers, and advanced automotive systems. This in-depth technical conference is the industry's premier processor event and we expect a number of new product announcements. In addition to over 20 technical presentations by experts from the companies leading the industry, the two-day conference program will include a keynote session covering technology and market trends in processor design.
The Fall Processor Conference is our largest event and includes dual-track presentations on the latest processor chips, processor IP and other technology required to efficiently process packet, sensor, and vision data.
This conference targets chip designers, system designers, equipment vendors, OEM/ODMs, service providers, press, and the financial community.
- Deep learning processor and IP
- Processors and IP for IoT devices
- Embedded processors and IP
- Networking processors and IP
- Server processors and accelerators
- Advanced automotive processors and IP
- Processors for IoT clients and gateways
- Plus other related technologies
For an idea of what you can expect from the technical program, view the 2017 agenda:
The conference includes:
- Sponsor exhibits and demos
- Evening networking reception on the first day
- Raffles by The Linley Group
- Hosted speaker tables at lunch (meet the presenters)
- Free parking
- Continental breakfasts and gourmet lunches
- Free Wi-Fi
Event Location: Hyatt Regency Hotel, Santa Clara, CA
Reception and Exhibits: 5:00-6:30pm
MIPI Member Demos
GEO Automotive Camera Video Processor, MIPI CSI-2℠
- GEO’s GW5200, world’s first edge-based automotive smart viewing camera processor
- MIPI CSI-2℠ standard compliant
- 4-lane Mixel MIPI D-PHY℠, Transmitter and Receiver
NXP i.MX 7ULP processor, MIPI DSI℠ IP Solution
- 28nm FD-SOI Ultra Low-Power Application Processor
- MIPI DSI℠ standard compliant
- Two lane Mixel MIPI D-PHY℠ Receiver
Lattice Semiconductor, Inc.
Lattice Crosslink 101 Demo Board
- MIPI D-PHY℠v1.1 - Physical Layer for Rx and Tx
- MIPI CSI-2℠ v1.1 - Camera Serial Interface Rx for Two Cameras
- MIPI DSI℠ v1.1 - Display Serial Interface Tx for Single Display
More information: http://www.linleygroup.com/events/event.php?num=45