Wednesday, May 26, 2021

Learn more and register »
26 May 2021
India 1-2 p.m. IST | Europe 9:30-10:30 a.m. CEST | China/Taiwan 3:30-4:30 p.m. CST | US 8:30-9:30 a.m. PDT


The MIPI RF Front-End Control Interface developed by the working group, now available as v2.1, simplifies design, configuration and integration of RF front-end devices, including power amplifiers, low-noise amplifiers, antenna tuners, filters, switches and others. It reduces the costs of these components and makes it easier for manufacturers to address end-user needs for faster data speeds. It can be used to develop scalable solutions and expedite time to market for new solutions in a wide range of industries, including the mobile sector and mobile-influenced vertical industries such as automotive and IoT.

Who should attend

Design engineers, test engineers, post silicon validation engineers, system design engineers, engineering managers, application engineers, SoC emulation engineers, RTL engineers, firmware engineers and hardware engineers, etc.


  • RFFE Protocol Basics
  • Overview of RFFE Protocol
  • Pain points and challenges of the RFFE Protocol Analysis
  • Capture the RFFE Protocol and Analysis
  • Live Product Demo


Mr. Anuj
Anuj is a FPGA Design Engineer who has worked on Prodigy’s System Power Management Interface (SPMI) Exerciser and Protocol Analyzer product (PGY-SPMI-EX-PD). Anuj has deep understanding of SPMI v1.0/v2.0 Specification and SPMI Protocol Implementation Conformance Statement (PICS) for SPMI v2.0 Specification. He has hands-on experience in debugging and fixing hardware issues reported during product development and has rich experience in resolving customer issues during product evaluation.