As devices demand faster access to data—driven by the need for richer user experiences, low latency and increasingly sophisticated edge AI workloads—flash storage needs to keep up. Representing a major step forward in delivering faster data access and improved performance, MIPI M-PHY® and MIPI UniPro® were recently updated to pave the way for the forthcoming JEDEC® Universal Flash Storage (UFS) 5.0 standard.
MIPI M-PHY v6.0 introduces a new high-speed gear, HS-G6, that significantly expands the physical-layer capabilities. By adopting PAM4 signaling and a new high-efficiency 1b1b line encoding scheme, HS-G6 enables up to 46.694 Gbps of bandwidth per lane—twice the potential data rate of the previous version. This leap in throughput is achieved while reducing PHY coding overhead, improving efficiency and preserving backward compatibility with earlier M-PHY versions.
M-PHY v6.0 also adds optional link equalization and training features that improve interoperability and provide additional performance margin. These capabilities are especially important as systems push to higher speeds that require tighter signal integrity requirements, particularly in automotive and industrial environments.
Building on the advancements at the physical layer, MIPI UniPro v3.0 augments the transport and link layers to fully leverage the higher data rates of M-PHY v6.0. UniPro v3.0 supports data speeds of up to 46.6 Gbps per lane, per direction, and introduces a new transport framing structure (TFS) alongside robust error-mitigation technologies, including Reed-Solomon forward error correction (RS-FEC) and a 64-bit cyclic redundancy check (CRC).
These features enable UniPro interconnects to operate at ultra-low bit error rates—less than 10⁻²² at the application layer—delivering the reliability required for mission-critical data movement. Additional improvements, such as faster high-speed link startup and a new link equalization training procedure, reduce latency and help systems quickly achieve optimal performance.
By leveraging the combined enhancements of M-PHY v6.0 and UniPro v3.0, UFS 5.0 will double the interface bandwidth and enable read and write speeds of up to approximately 46.6 Gbps per lane per direction. For data-intensive applications, this translates to reduced load times, faster system responsiveness and more efficient data movement under power constraints.
These improvements are particularly impactful for emerging use cases such as edge-AI workloads, including large language models (LLMs) running locally on devices. Higher bandwidth and lower latency allow models to load faster and process data more efficiently, while improved reliability ensures consistent operation across a wide range of environments—from smartphones and PCs to automotive and industrial systems.
To explore these advancements, the chairs of the MIPI M-PHY and UniPro working groups, along with the co-chair of the JEDEC UFS Technical Group, will present a joint webinar titled “The Evolution of UFS: Leveraging M-PHY v6.0 and UniPro v3.0 for Next-Generation Performance, Power Efficiency and Reliability” on 31 March 2026. The webinar will detail how the latest specifications work together to enable the next generation of high-performance flash storage.
The continued collaboration between MIPI Alliance and JEDEC helps to ensure that the storage ecosystem is well positioned to support the accelerating demands of AI-driven, data-intensive devices today and well into the future.