A performance-driven PHY for multimedia and chip-to-chip inter-processor communication (IPC) applications
Supports MIPI CSI-3, MIPI DigRF, MIPI LLI, and MIPI UniPro
- JEDEC for UFS
- PCI SIG for M-PCIe
- USB IF for SSIC
- High performance
- Low power
- Low EMI
- Robust operation
UFS memory interface
MIPI M-PHY® is designed for data-intensive applications that require fast communications channels for high-resolution images, high video frame rates and large displays, or for memories. It is a versatile PHY, offering engineers configuration choices and ability to develop across industry platforms to efficiently address multiple markets and use cases for their designs. It can interconnect components in smartphones, wearables, PCs and even larger systems, such as automobiles.
MIPI M-PHY is developed by the MIPI PHY Working Group.
The specification targets applications that have a particular need for low pin count, lane scalability and power efficiency. Key applications include connecting cameras, audio, storage, RF and providing chip-to-chip inter-processor (IPC) communications.
MIPI M-PHY uses a differential signaling with an embedded clock. It provides two transmission modes with different bit signaling and clocking schemes intended for different bandwidth ranges to enable better power efficiency over a broad range of data rates. The achievable peak transmission rate is 11.6 Gbps on one lane and 46.4 Gbps over four lanes. The high bandwidth per lane can reduce the number of lanes required. This feature is particularly practical for wearables and smartphones, as well as for laptops that require installation of interconnections within mechanical hinges. M-PHY v4.1 adds features and editorial improvements requested by the UniPro WG to support MIPI UniPro℠ v1.8, including ADAPT clarifications.
MIPI M-PHY is used as the physical layer for the MIPI CSI-3, MIPI DigRF, MIPI LLI, and MIPI UniPro protocols. MIPI M-PHY supports these native MIPI Alliance protocols as well as protocols from the PC ecosystem to provide a technology bridge allowing convergence between mobile devices and PCs. PC-industry protocols that use MIPI M-PHY include Universal Flash Storage from JEDEC, Mobile PCIexpress from the PCI-SIG, and SuperSpeed Inter Chip (SSIC) from the USB IF.
MIPI M-PHY, combined with the MIPI UniPro transport layer in the MIPI UniPort-M interface, is also used in innovative network implementations within a mobile device.
MIPI M-PHY also gives designers the flexibility to use optical media for routing high-speed connections inside a system. The optical implementations can be configured to build connections that are meters in length to support designs in larger-sized platforms, such as automobiles.
The specification is available only to MIPI Alliance members. For information about joining MIPI alliance, see Join MIPI.