MIPI Display Serial Interface 2 (MIPI DSI-2)

MIPI DSI-2^SM, published in January 2016, supports ultra-high definition (4K) and higher resolutions required by new and future mobile displays. The resolution limit depends on the available speed of the underlying MIPI physical layer.

MIPI DSI-2 supports all of the same power-saving features as its predecessor, MIPI DSI, but adds better resilience to electro-magnetic interference by introducing data scrambling. In addition, MIPI DSI-2 offers scalability in terms of resolution.

Designers can use MIPI DSI-2 on two different physical layers: MIPI D-PHY and MIPI C-PHY. The options give designers flexibility to support different configurations up to four data lanes.

MIPI DSI-2 uses a command set defined in the MIPI Display Command Set (MIPI DCS) and also incorporates the Display Stream Compression (DSC) Standard from the Video Electronics Standards Association (VESA).

Although the features of MIPI DSI-2 are quite similar to MIPI DSI, the primary difference is its support for C-PHY. However, it also features backward compatibility with DSI on D-PHY. In addition, because MIPI DSI is a mature, stable specification, future developments will be concentrated on expanding the capabilities of MIPI DSI-2.

MIPI DSI-2 is developed by the MIPI Alliance Display Working Group.

Note: The specification is available only to MIPI Alliance members. For information about MIPI Alliance membership, visit Join MIPI.