The MIPI PHY Working Group, formed in 2004, is chartered to create point-to-point high-speed serial physical layer (PHY) specifications for mobile and mobile-influenced designs. The charter directs the group to develop autonomous PHYs that can be used by other MIPI Alliance specifications, as well as specifications defined by external organizations that are liaison partners to the MIPI Alliance. Each PHY specification developed by the group is intended to support a wide range of high-speed applications.
The MIPI PHY Working Group is currently addressing two key problems:
- a need for PHYs that can support internal high-speed communications required by mobile and mobile-influenced devices that operate on current and forthcoming mobile standards
- a need for modular PHY concepts that can support various applications
The MIPI PHY Working Group defines physical layer specifications and the interfaces between the physical layers and protocol layers its specifications support. The group crafts its specifications to meet the current and anticipated needs of the higher-level applications while providing backward compatibility to previous PHY specifications it has released. The group draws on the guidance and input from stakeholders, such as the MIPI Camera, DigRF, Display, LLI, UniPro and Test Working Groups. It also considers requirements from liaison partners such as JEDEC, the USB Implementers Forum, and the PCI-SIG.
In support of MIPI's automotive efforts, the group has begun development of A-PHY, a new physical layer specification (up to 15m) targeted for autonomous driving systems (ADS), advanced driver assistance systems (ADAS) and other surround sensor applications. MIPI A-PHY v1.0 is expected to be available to developers in late 2019.
The first specification developed by the MIPI PHY Working Group, MIPI D-PHY, supported the requirements of camera and display applications. MIPI D-PHY is a low-power, differential signaling solution with a dedicated clock lane and one or more scalable data lanes. To support longer term requirements for more advanced applications, the group developed MIPI M-PHY, a “performance PHY” for higher speed, low-power, embedded clock designs. MIPI M-PHY uses differential signaling and supports several industry specifications developed by MIPI Alliance as well as its partner organizations. A third specification, MIPI C-PHY, is a low-power interface using data encoding for a reduced toggle rate with embedded clocking. It provides connectivity for camera and display applications on a three-wire interface.
The group is very active, continually working to advance the MIPI PHY specifications to match the eco-system’s needs.
Henrik Icking, Intel
Raj Kumar Nagpal, Synopsys
MIPI Alliance members at the Contributor level and above may participate by subscribing to the group on the member website.