PHY Steering Group

PHY Steering Banner Images - MIPI (2) (1)
Status: ACTIVE




About the Group

Raj Kumar Nagpal, Synopsys

Vice Chair
George Wiley, Qualcomm

A-PHY Working Group
Co-chairs: Edo Cohen and Raj Kumar Nagpal
Vice chair: Ariel Lasry

C-PHY Working Group
Chair: George Wiley

D-PHY Working Group
Chair: Raj Kumar Nagpal

M-PHY Working Group
Chair: Sergio Silva

MIPI Alliance members at the Contributor level and above may participate by subscribing to the group on the member website.

Related Specifications: 







The MIPI PHY Steering Group (PSG) was promoted from a working group in 2021 to align and coordinate physical layer development within the four MIPI physical layer (PHY) working groups: 

  • MIPI A-PHY Working Group

  • MIPI C-PHY Working Group

  • MIPI D-PHY Working Group

  • MIPI M-PHY Working Group

With support from the PHY Steering Group, the working groups will continue development of MIPI Alliance's point-to-point high-speed serial physical layer specifications for mobile and mobile-influenced designs. These autonomous PHYs are used by other MIPI Alliance specifications, as well as by specifications defined by external organizations that are liaison partners to the Alliance. Each PHY specification is intended to support a wide range of high-speed applications.


The MIPI PHY Steering Group coordinates with the individual PHY working groups to define the physical layer specifications, and the interfaces between the physical layers and protocol layers its specifications support. MIPI PHY specifications are crafted to meet the current and anticipated needs of the higher-level applications, while providing backward compatibility to previously released versions.. 

The group draws on guidance and input from stakeholders, such as the MIPI Camera, Display, Audio, UniPro and Test working groups, as well as requirements from liaison partners such as JEDEC, the USB Implementers Forum and others.


The first specification developed by the group, MIPI D-PHY, supports the requirements of camera and display applications. MIPI D-PHY is a low-power, differential signaling solution with a dedicated clock lane and one or more scalable data lanes.

To support longer term requirements for more advanced applications, the group developed MIPI M-PHY, a “performance PHY” for higher speed, low-power, embedded clock designs. MIPI M-PHY uses differential signaling and supports several industry specifications, such as UFS developed by JEDEC.  

MIPI C-PHY is a low-power interface using data encoding for a reduced toggle rate with embedded clocking. It provides connectivity for camera and display applications on a three-wire interface.

In support of MIPI's automotive efforts, MIPI A-PHY was introduced in 2020. This new long-reach (up to 15m) SerDes physical layer specification is targeted for autonomous driving systems (ADS), advanced driver assistance systems (ADAS) and other surround sensor applications. 

The PHY groups are  very active, continually working to advance the MIPI PHY specifications to match the ecosystem’s needs.