MIPI D-PHY

MIPI D-PHYSM connects megapixel cameras and high-resolution displays to an application processor. It is a clock-forwarded synchronous link that provides high noise immunity and high jitter tolerance. MIPI D-PHY also offers low latency transitions between high speed and low power modes.

MIPI D-PHY is a popular PHY for cameras and displays in smartphones because it is a flexible, high-speed, low-power and low-cost solution. It can be applied for many other use cases, such as automotive camera sensing systems, collision avoidance radars, in-car infotainment and dashboard displays.

MIPI D-PHY is developed by the MIPI PHY Working Group.

The current release, v2.1, adds features requested by the MIPI Camera WG to support MIPI CSI-2℠ v2.0, including HS-IDLE and Low Voltage Low Power (LVLP) mode. It includes a high-speed signaling mode for fast traffic and a low-power mode to preserve battery life, and it can switch between the two modes in real time.

Operation and available data rates for a link are asymmetrical due to a master-slave relationship of the link transceivers. The asymmetrical design significantly reduces the complexity of the link and is well- suited for a display use case with one major data transmission direction, for example. Bi-directional and half-duplex operation are optional.

The specification is available only to MIPI Alliance members. For information about joining MIPI alliance, see Join MIPI.