MIPI Alliance
Sessions & Presenters
Introducing MIPI I3C and Supporting Software Tools
Matthew Schnoor, Member of MIPI I3C, Software and Debug working groups; Debug Architect, Intel Corporation
Michele Scarlatella, IoT Technical Consultant, MIPI Alliance
This session provides a brief introduction to the I3C ecosystem, as well as an overview of the software tools MIPI has developed to support the adoption and use of the I3C interface. It covers MIPI I3C HCI, I3C TCRI and DisCo for I3C.
Discovering Advanced Features of the MIPI I3C Interface
Tim McKee, Chair of the MIPI I3C Working Group; System Architect, Intel Corporation
This session describes how the advanced features of MIPI I3C can enable sophisticated use cases, such as synchronous data acquisition from a set of identical sensors, data acquisition with highly precise timing, high-rate modes that improve speed and data reliability, and error detection and handling.
Member Use Case: Using I3C for Out-of-Band System Management in Data Centers
Max Prasad, Senior Applications Engineer, Microchip Technology
MIPI I3C is already being used today to perform out-of-band system management in data center environments. This session explains how:
- DMTF’s Management Component Transport Protocol (MCTP) has been deployed using I3C interfaces to serve the PC, server and storage markets.
- The use of MCTP-over-I3C benefits system design by overcoming the limitations of using legacy out-of-band system management interfaces, such as SMBus and I2C.
Coming to Grips with MIPI I3C Testing, Debugging, and Conformance
Jonathan Georgino, Member of MIPI I3C Working Group; Founder & CTO, Binho LLC
This session paves the road for engineers to follow on their first I3C implementations, highlighting key techniques, tools and tips for testing and debugging I3C bus operation. The session also explores the I3C conformance test suite (CTS) and the I3C plugfest events hosted by the MIPI I3C working group to help improve interoperability.
Member Use Case: Using MIPI I3C to Create Effective Debug Architectures
Matthias Zens, Software Architect – Debug and Trace Tools, Lauterbach GmbH
This presentation explores the requirements that debug tools place on target systems and explains how the MIPI I3C interface, in combination with MIPI’s portfolio of debug and trace specifications, can be leveraged to create effective debug solutions. The session covers:
- The benefits of using I3C for debug and how to use MIPI debug protocols over I3C in the most effective way.
- Mapping common debug requirements to the MIPI Debug for I3C specification, which includes the use of Simplified Address-Mapped (SAM) protocol, MIPI SneakPeek Protocol (SPP), MIPI System Trace Protocol (STP), and more.
- How to choose the optimum MIPI debug architecture configuration.
- The effectiveness of various MIPI debug architecture variations, including indicative performance figures, compared to legacy debug solutions.
Techniques to Achieve Optimal Implementation of a MIPI I3C Target
Aradhana Kumari, Technical Leader, STMicroelectronics
This presentation describes implementation techniques and methods to achieve an optimal silicon footprint for an I3C target design. The advice described will be independent of process technology and can be deployed across different design platforms.
