A physical layer for high-performance, cost-optimized cameras and displays

Quick Facts

Specs Supported

Supports MIPI CSI-2 and MIPI DSI-2 applications and high-speed/low-power interfaces

Fundamental features
  • High performance
  • Low power
  • Low EMI
Use Cases

Smartphone cameras and displays

Smart watch displays

In-sight (glass) products

In-car infotainment and dashboard displays

Automotive camera and radar sensors

Industries

Icon of a Smart PhoneIcon of a TabletIcon of a laptopIcon of an AutomobileIcon of a cloud with the letters IoT inside.Icon of a cameraIcon of a Smartwatch

Overview

MIPI C-PHYSM provides high throughput performance over bandwidth-limited channels to connect displays and cameras to an application processor. It provides a PHY for the MIPI Camera Serial Interface (MIPI CSI-2) and MIPI Display Interface (MIPI DSI-2) ecosystems, enabling designers to scale their implementations to support a wide range of higher resolution image sensors and displays while keeping power consumption low. It can be used to connect low-cost, low-resolution image sensors, sensors offering up to 60 megapixels, as well as display panels offering 4K and higher resolution. It can be applied for many other use cases, such as automotive camera sensing systems, collision avoidance radars, in-car infotainment and dashboard displays.

MIPI C-PHY is an embedded clock link that provides extreme flexibility to reallocate lanes within a link.

It also offers low latency transitions between high speed and low power modes. MIPI C-PHY accomplishes this by departing from a conventional differential signaling technique on two-wire lanes and introducing three-phase symbol encoding of about 2.28 bits/symbol to transmit data symbols on three-wire lanes, or “trios”, where each trio includes an embedded clock. Three trios operating at 3.5 Gsym/s achieve a peak data rate of about 24 Gbps over a nine-wire interface. MIPI C-PHY can coexist on the same device pins as MIPI D-PHY, so designers can develop dual-mode devices.

MIPI C-PHY is developed by the MIPI PHY Working Group.

Operation and available data rates for a link can be asymmetrical, which enables implementers to optimize the transfer rates to system needs. Bi-directional and half-duplex operation are optional.

Released March 2017: C-PHY v1.2. This version adds features requested by the MIPI Camera WG to support MIPI CSI-2 v2.0, including higher symbol rate, advanced equalization, Alternate Low-Power (ALP) mode, optional Low Voltage Low Power (LVLP) mode, and HS Reverse mode.

Note: The specification is available only to MIPI Alliance members. For information about joining MIPI alliance, see Join MIPI.