MIPI C-PHY℠ provides high throughput, a minimized number of interconnect signals and superior power efficiency to connect displays and cameras to an application processor. This is due to efficient three-phase coding that is unique to C-PHY. This efficiency minimizes the cost of system interconnect and also minimizes emissions to sensitive RF receiver circuitry that is often co-located with the multimedia interfaces.
C-PHY provides a physical layer for the MIPI Camera Serial Interface 2 (MIPI CSI-2®) and MIPI Display Interface 2 (MIPI DSI-2℠) ecosystems, enabling designers to scale their implementations to support a wide range of higher-resolution image sensors and displays, while keeping power consumption low. The specification can be used to connect low-cost, low-resolution image sensors, as well as high-performance sensors offering up to 60 megapixels and display panels offering 8K and higher resolution. C-PHY can be applied for many use cases and industry segments, including mobile, wearable technologies, the IoT, drones, personal computers and automotive.
MIPI C-PHY can coexist on the same device pins with MIPI D-PHY℠, so designers can develop dual-mode devices. Operating data rates for a link can be asymmetrical, which enables implementers to optimize the transfer rates to system needs and also enables link operation using only C-PHY’s high-speed signaling levels. Bi-directional and half-duplex operation are optional.
MIPI C-PHY is developed by the MIPI C-PHY Working Group and is available only to MIPI Alliance members. For information about participating in MIPI Alliance, see Join MIPI.