At the recent MIPI Alliance Member Meeting in Berlin, members of the MIPI I/O Bridges Working Group shared a demo of the forthcoming MIPI Specification for I/Os Over I3C Bridge, expected to be released later this year.
The demonstration showcased two independent implementations using components from MIPI members Microchip Technology, Binho LLC and NXP Semiconductors, illustrating how the draft specification enables an I3C controller to communicate through an I/O bridge with target devices using I²C, SPI and UART interfaces.
This demonstration provided an early validation of the draft specification while also showcasing its practical implementation. The forthcoming specification will enable an I3C controller in a host system to access multiple I²C, SPI, UART and GPIO interfaces without requiring native support for these legacy interfaces. This approach reduces system pin count, simplifies printed circuit board (PCB) routing, lowers power consumption and consolidates device management over a single high-performance interconnect.
Example use of an I/Os Over I3C Bridge
In the first part of the demonstration, a Microchip dsPIC33AK acted as the I3C controller, while a Microchip PIC18-Q20 running Microchip firmware operated as the I/O bridge. The second part featured an NXP MCX N947 running firmware developed by Binho as the I3C controller, again communicating with the Microchip PIC18-Q20 acting as the I/O bridge.
The demonstration showcased two different setups.
The demonstration began with each I3C controller discovering the bridge and retrieving its capabilities using standard I3C commands. The presenters then demonstrated communication over the bridge with multiple downstream interfaces—for example, using I²C to drive LEDs connected to an I/O expander and retrieving live data from a temperature sensor. SPI transactions demonstrated memory read and write operations, while UART communication enabled commands to be sent through the bridge to an ESP32-C6 running a Zephyr shell, providing immediate visual feedback through RGB LED control.
Throughout the demo, the bridge used I3C in-band interrupts (IBIs) to notify the controller when responses were available, while a protocol analyzer captured each stage of communication, allowing working group members to observe I3C transactions, downstream bus activity, bridge-generated IBIs and response transfers in real time.
The demonstration illustrated how the upcoming MIPI Specification for I/Os Over I3C Bridge will provide a standardized method for integrating legacy peripheral interfaces into modern I3C-based systems.
By showcasing interoperable implementations from multiple member companies, the working group demonstrated both the growing maturity of the specification and its potential to support the next generation of embedded system designs. Equally important, the exercise identified inconsistencies and proposed refinements in the current draft specification. Identifying and resolving those issues was a primary objective of the demonstration and represents an important step in the creation of a robust, interoperable specification.
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