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Upcoming - MIPI DevCon 2023: Out of Box MIPI I3C Target Design


June 30, 2023
1:35 p.m.
San Jose, Calif.


A contemporary MIPI I3C® target IP will usually use an external system clock from the SoC. This session will discuss an all asynchronous I3C target device IP that works without any external clock. It only uses the I3C bus clock SCL for executing all its functionality. This enables the proposed target I3C IP subsystem to be very easily integrated in the SoC environment. In addition, this provides power savings as no running clock is incident on the target.

Ankur Bal, Senior Principal Engineer, and Aradhana Kumari, Senior Design Engineer,

Ankur Bal has more than 23 years of experience in the semiconductor industry. He is a senior principal engineer and a senior member of the technical staff leading a team responsible for the design of digital and mixed signal IPs at STMicroelectronics. His current work focuses on digitally assisted analog design using advanced digital and statistical signal processing methods. In addition, he is responsible for the design and development of mixed signal systems for data converters, analog sensors, high-speed links and embedded cores. He has more than 70 U.S. patents.

Aradhana Kumari completed her masters in VLSI and embedded systems from the Indian Institute of Technology in Patna, India, in 2020. She has three years o domain experience and is currently a senior design engineer at STMicroelectronics Greater Noida, India. She specializes in digital design with a focus on serial link controller (MIPI I3C) design. She has two U.S. patents.

Ankur Bal and Aradhana Kumari