2 November 2023
4 p.m. CET / 7 a.m. PT
MIPI I3C® (and the publicly available MIPI I3C Basic℠) is a scalable, general purpose, two-wire serial communication bus specification for connecting peripherals to microprocessors and microcontrollers. Designed as the successor to I2C, it supports numerous innovative features that build upon the key attributes of the I2C, SPI and UART interfaces. As a result, MIPI I3C provides a high-performance, low-power, low-pin count upgrade path for existing implementers of these interfaces and makes an ideal interface for numerous applications, including sensor control and data transport, memory sideband channel, “always-on” imaging, server system management, debug communications, touchscreen communication and power management.
The presentation will provide a technical overview of the I3C interface and explain how it can be used to connect next-generation components. It will cover:
- I3C bus configuration and roles, including primary controller, secondary controller, I2C target, bridging devices and routing devices.
- Relationship between the I3C and I3C Basic specifications.
- Performance features such as the ability to double the data rate using SDA shifts on each SCL transaction, multi-lane capility that provides an eightfold speed increase over I2C, and bulk transport mode that supports dual/quad SDA lanes.
- Description of the main bus transactions and common command codes.
- Use of dynamic addressing to tie an address to a function of a device, simplifying system management & SW drivers.
- Efficient data acquisition with in-band interrupts, providing an efficient mechanism for targets to grab controller attention, avoiding extra dedicated wires or inefficient polling mechanisms.
Use of hot-join to attach devices after the I3C bus is configured for improved power management, selective powering of subunits and enabling device wake-up only when needed.
The presentation will also provide an overview of related specifications such as the MIPI I3C Host Controller (I3C HCI℠) interface, and resources available within the I3C ecosystem to aid developers, including the I3C driver for the Linux kernel, conformance test suites, application notes, FAQs, presentations and white papers. In addition, presenters will share more information about how to get involved in the MIPI I3C Working Group and interoperability events.
Attendees will learn:
- How the I3C serial interface enables new low power use cases
- How the publicly available I3C Basic bundles key features required by developers
- How the key attributes of the I3C interface, including bus speeds, pin counts, power consumption, power-saving features, and supporting tools and drivers, support numerous next-generation applications
Chair of the I3C Working Group
Tim is a hardware engineer with over 10 years of experience working in the semiconductor industry. He is currently a system architect at Intel Corporation, where he works to create and enable standards for industry advancement. In 2020 he was elected chair of the MIPI I3C Working group (formally called the MIPI Sensor Working Group), where he leads a cross-industry group of MIPI members who develop and maintain the MIPI I3C and I3C Basic interface specifications. Tim has also led activities within the USB Implementers Forum, PCI Special Interest Group and CXL Consortium, and helped lead the liaison activities between MIPI and JEDEC to create the JESD403 Sideband Bus Specification. Tim holds a bachelor of science degree in electrical and computer engineering from Oregon State University.
IoT Technical Consultant to MIPI Alliance
As a longtime contributor to the MIPI I3C specification, Michele currently serves as an IoT technical consultant for MIPI Alliance. Formerly, he spent 18 years at STMicroelectronics covering multiple senior roles including director of technology and system architecture within the Microcontroller & ICs Division, and director within the central marketing team for secure microcontrollers. He participated on the board of directors for the Trusted Connectivity Alliance (formerly SIMAlliance) for over 10 years. Michele began his career in basic scientific research and academia, working at the Stanford Linear Accelerator Center. Michele holds three patents and has published more than 50 scientific papers.
Eyuel Zewdu Teferi
Vice Chair of the I3C Basic Ad Hoc Working Group
Eyuel Zewdu has been with STMicroelectronics since 2016 and is currently a senior hardware design engineer in ST's MEMS sensor division. He has worked on projects designing and implementing interface designs for MEMS sensors. He earned his master's degree in electronics engineering in Politecnico di Torino, focusing on embedded systems. He is involved in both MIPI and JEDEC, is an active member of the MIPI I3C working Group and is currently the vice chair of the MIPI I3C Basic Ad-hoc Working Group.