An I3C Target that supports both Legacy I2C and I3C buses typically initializes in I2C mode, as it does not yet possess a Dynamic Address, and also might not know what type of bus is used. However, the Target should be ready to receive a Dynamic Address from an I3C Controller. If the Target also has an I2C Static Address, then it may operate on a Legacy I2C bus using that Static Address. An I3C Target may also support an I2C 50 ns Spike Filter for I2C Fm and Fm+ modes, and it may support other I2C features that are not supported by I3C (such as Device ID). However, per specification Section 5.1.1.1, these features may only be used on a Legacy I2C bus, never on an I3C Bus.

For I3C Buses with such I3C Targets, the I3C Controller must emit the first I3C Address Header with the Broadcast Address (7’h7E) at a rate that is slow enough to be seen through an I2C Spike Filter. This allows such an I3C Target to disable its Spike Filter once it sees the first I3C Address Header with the Broadcast Address (see Q24.1, "Are there any special timing requirements for sending the first START with the Broadcast Address?" and the specification at Section 5.1.2.1.1).

If the I3C Target does not have an I2C Static Address, then it will simply wait for the first I3C Address Header from an I3C Controller (i.e., an I3C Address Header containing the Broadcast Address). Such a Target would be of no value on a Legacy I2C bus, since I2C relies on each Target having a Static Address.

Note: If such an I3C Target supports any Legacy I2C features that are not allowed on an I3C Bus (e.g., clock stretching), then the implementer must ensure that these features are never used, unless the Target knows with certainty that it is on a Legacy I2C bus and not on an I3C Bus.

An I3C Target must not use clock stretching on an I3C Bus, since clock stretching is not allowed (see the specification at Section 5.1.1.1) and the SCL line is typically managed by the I3C Controller, and is driven in Push-Pull mode.

FAQ Type: 
I3C