In I3C v1.1, tCASr’s minimum value is reduced to tCASmin/2 (whereas in I3C v1.0, it is tCASmin). This reduced duration might be a challenge for some Slaves. In order to prevent such situations, the Master of the Bus shall provide suitable timing, accommodating the slowest Devices on the Bus.

In the I3C v1.1 Specification, Table 111 “I3C Push-Pull Timing Parameters for SDR, ML, HDR-DDR, and HDR-BT Modes” includes a clarifying note:

9) Slaves with speed limitations inform the Master via the Bus Characteristics Register that the minimum may not be acceptable. As a result, if the given SCL HIGH period is 50 ns or greater, the Master needs to accommodate for Legacy I2C Devices that might see it.

FAQ Type: