Error Type TE0 (formerly named Error Type S0; see specification Section 5.1.10.1.1) now more clearly defines the I3C Target Address restrictions for an I3C Controller, and explains the single-bit error conditions that might occur if the restricted Addresses were used.

Error Type TE5 (formerly named Error Type S5; see Section 5.1.10.1.6) now only provides examples of “illegally formatted” CCCs that include an incorrect RnW bit for a Direct CCC. Error Type TE5 no longer lists unsupported CCCs as an error case (see Q23.7, "What errors does Target Error Type TE5 cover?").

Note that the Target requirements for handling an unsupported Command Code or unsupported Defining Byte are now defined in specification Section 5.1.9.2.2. Although these cases are not strictly covered by Error Type TE5, a Controller might interpret a Target’s NACK response similarly and handle it with the same recovery procedure.

Error Type TE6 (formerly named Error Type S6; see Section 5.1.10.1.7) now clearly defines the difference between the Target’s response to a CCC that it perceives as a Read (i.e., a Direct GET or a Direct Read) when there is an error in the RnW bit. This better explains the way that the Target should handle the error situation, i.e., when the Controller actually intended to send a Write (i.e., a Direct SET or a Direct Write).

FAQ Type: 
I3C