In I3C v1.0, parameter tCASr’s minimum value was tCASmin. In I3C v1.1, this was reduced to tCASmin/2. Since satisfying this reduced duration might be challenging for some Targets, the Controller is required to provide suitable timing, i.e., is required to accommodate the slowest Devices on the Bus.

In version 1.1 of the I3C specification, a new Note clarifying this point was added to Table 111 I3C Push-Pull Timing Parameters for SDR, ML, HDR-DDR, and HDR-BT Modes (in Section 6.2):

9) Targets with speed limitations inform the Controller via the Bus Characteristics Register (BCR)

that the minimum may not be acceptable. As a result, if the given SCL HIGH period is 50 ns or greater, then the Controller needs to accommodate for Legacy I2C Devices that might see it.

In the I3C v1.1.1 specification, this Note appears in the equivalent Table 123. In the I3C Basic v1.1.1 specification, it appears in the equivalent Table 87.

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