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Members Test MIPI I3C Interoperability in Seoul

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In conjunction with the MIPI Member Meeting #49 in Seoul, the Sensor Working Group hosted the MIPI I3C® Interop Workshop on 15-16 October. The event drew 19 representatives from eight member companies.

"MIPI's I3C workshops help members ensure interoperability of their components, improve product quality, speed the development process and optimize the manufacturability of their designs,” said Ken Foust, chair of the MIPI Alliance Sensor Working Group. "Participants regard these events as an essential step in the product development process because the testing and debugging activities take place in real-world system integration environments."

The workshop provided adopters the opportunity to engage in interoperability testing between master and slave devices in a confidential environment. Participants were able to test the following features:

Interop event October 2018
  • Pure and Legacy I3C SDR Read/Write
  • Dynamic Address Assignment (including SETDASA)
  • IBI with/without MDB
  • Basic Direct CCCs
  • Enter/Exit HDR
  • DDR Read/Write/CRC
  • TSP Read/Write
  • Master/Slave Error Handling
  • Multi-Slave Topologies (including Direct/Broadcast CCCs)
  • Timing Control (Sync Mode, Async Mode 0)
  • Secondary Master/Main Master Handoff
  • Approved/Proposed I3C v1.1 capabilities