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New MIPI Specification Standardizes Transfer Command and Response Across I3C/I3C Basic Implementations

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The recently released and publicly available MIPI I3C Transfer Command Response Interface (MIPI I3C TCRI℠ ) specification defines standard transfer command and transfer response structures that MIPI I3C controller implementations can use as part of an interface for any application. As such, the value of this new foundational specification will grow over time as MIPI I3C® and MIPI I3C Basic℠ are more widely deployed, rendering software more easily reusable across diverse implementations.


How TCRI Fits Into the I3C Solution Stack

MIPI I3C, originally introduced in 2016 and designed as the successor to I2C, provides a scalable utility and control bus interface that unifies legacy solutions while combining high performance with very low power in connecting peripherals to a processor. The interface gives developers unprecedented opportunities to craft innovative designs for any mobile product—from smartphones, to wearables, to systems in automobiles. The publicly available MIPI I3C Basic version is a subset of the full specification that bundles together the features most commonly needed by developers and other standards organizations.

Building upon I3C and I3C Basic, the MIPI I3C Host Controller Interface (MIPI I3C HCI℠) specification released in 2018 delivered breakthrough efficiencies for designers of I3C applications by providing a consistent method for interfacing operating systems to I3C or I3C Basic and eliminating the need for product-specific drivers. The generic, portable I3C/I3C Basic drivers that I3C HCI enables convey greater control over ongoing development costs and complexity.

Released earlier this fall, I3C TCRI v1.0 is intended to deliver a new leap forward in efficiency in I3C and I3C Basic deployment. The new specification enables developers to easily reuse specific portions of normative definitions for transfer command and response in the existing I3C HCI specification across disparate applications.


Standardizing the “What” of Transfer Command and Response

Splitting out the transfer command and response pieces into their own specification merely formalizes a logical separation that already existed in MIPI I3C HCI. That specification includes two logical layers that define the “what” and “how” of transfer command and response.

The “what” is the transfer command structures—i.e., this command goes in, and this response comes out. The “how” defines the mechanism by which a host sends a command to the host controller, confirms that it gets processed and acquires a response back.

While I3C HCI is well-suited to defining the local host controller interface for application processors and even for general-purpose computers, the MIPI Software Working Group saw that the “how” part of I3C HCI did not make sense to standardize across other domains where I3C/I3C Basic is poised for adoption as it would necessitate modifications for each specific use case. The “what” portion, however, was ideally suited to be described in its own document that designers could use as a standard definition of commands and responses flowing in two directions without concern about application-specific details such as registers. Effectively, implementers wouldn’t have to reinvent the wheel in terms of writing entirely new software for these functions around each new implementation of I3C/I3C Basic.

The resulting I3C TCRI specification standardizes initiation of I3C/I3C Basic writes and reads, as well as behavioral requirements for an I3C controller for processing I3C transfers in sequences. I3C TCRI abstracts the basic functions of transfer command and response behaviors, data structures and flow requirements, and the top layer of the software stack doesn't have to change, whether I3C/I3C Basic is deployed in a local system with an I3C HCI-compliant controller, or over MIPI A-PHY®, Ethernet or another bus.

The result is better, more efficient support of new and emerging use cases for I3C/I3C Basic—and, potentially, greater marketplace adoption.


Accessing the Specification and Future Extensions

MIPI I3C TCRI is publicly available to developers and the open-source community (download the specification).

The forthcoming MIPI I3C HCI v1.2 specification will be the first to use I3C TCRI as a normative reference, and others could soon follow. A Protocol Adaptation Layer (PAL) for running I3C over MIPI A-PHY is set to be the first new application of MIPI I3C TCRI, and running I3C over Ethernet is another potential application. I3C TCRI could also serve as the starting point for any network integrations that encapsulate I3C/I3C Basic.

I3C TCRI will have its own revision activities separate from those of I3C HCI. The MIPI Software Working Group will consider the proper update cadence for I3C TCRI relative to the application specifications that use it. Revision of the new specification is projected to be less frequent, driven by emergence of capabilities of the I3C/I3C Basic bus, such as new transfer modes, multi-lane configurations or long-reach configurations.

Input from developers interested in forthcoming I3C/I3C Basic innovations will be especially key in ensuring the ongoing relevance of I3C TCRI. We welcome your contributions. To engage, please contact the MIPI Software Working Group at


Matthew Schnoor is a debug architect at Intel and has more than two decades of experience in various Intel business groups. With MIPI Alliance, Matthew has primarily focused on software development, silicon validation and system debug architecture. He currently serves as chair of the MIPI Software Working Group and also works across and within several other MIPI groups to support development within the MIPI I3C ecosystem.