In 2019 the Sensor Working Group was renamed to “I3C Working Group”. Its member companies often change, but the following is a recent representation: Intel, Invensense, Lattice, NXP, Prodigy, Qualcomm, Robert Bosch, STMicroelectronics, Synopsys, and Sony.
Some vendors have started to offer Slave and/or Master IP cores for integration into ASIC devices and FPGAs, including a free-of-cost Slave IP available for prototyping and integration.
A few vendors have provided FPGA based design kits, including some low-cost FPGAs that might be good enough for smaller production runs.
Under the original name of “MIPI Sensor Working Group,” representatives from AMD, Broadcom, Cadence, IDT, Intel, InvenSense, Knowles, Lattice Semiconductor, MediaTek, Mentor Graphics, Nvidia, NXP, Qualcomm, QuickLogic, Sony, STMicroelectronics, Synopsys, VLSI Plus, and others created the MIPI I3C v1.0 and MIPI I3C Basic v1.0 Specifications. The WG was (and is still) chaired by Ken Foust of Intel, and vice-chaired by Satwant Singh of Lattice Semiconductor.
The I3C Specification is defined by the MIPI Alliance I3C Working Group (originally named the Sensor Working Group) which was formed in 2013. I3C Basic is defined by the MIPI Alliance I3C Basic Ad-Hoc Working Group which was formed in 2018.