System Power Management Interface Specification

The SPMI specification is optimized for the real time control of power management ICs or any other device requiring control connectivity. Scalable from simple to complex architectures:

  •  Low pin count and low gate count
  • High speed compared to legacy interfaces
  • Low latency
  • Supports multiple processor devices operating using the same shared bus
  • Priority management by traffic classes

A Frequently Asked Questions document is also available.

Complete specifications are available to MIPI members only. For more information on joining MIPI, please go to Join MIPI.

 

Introduction

The complexity and performance requirements of mobile phones and other portable electronic devices are increasing at an ever-accelerating rate. As the demand for new high performance, high data rate features increases system level power management is becomes more critical. The use of advanced power management techniques to reduce power consumption and improve battery life is becoming more important than ever before.  

Reducing power consumption of digital processors in portable electronic devices can improve the battery life and increase the available power budget for features such as color screens and backlights. These are standard features on portable devices such as wireless handsets, handheld gaming consoles and portable media players.  

To minimize power consumption of digital processors in portable electronic devices, system and IC designers are now using advanced power management techniques. Advanced hardware and software techniques are now being used to: • Accurately monitor and control processor performance level required for a given workload or application • Control various supply voltages based on the performance level

Rapid deployment of such advanced power management techniques requires interface standardization. This System Power Management Interface (SPMI) specification addresses hardware interface standardization.

Scope

This document describes the low-level protocol, communication sequences and arbitration process device IDs used to implement SPMI. In addition, the bus topology, I/O structures/physical layer and signal timing requirements are also within the scope of this document. Higher level protocols, software driver design and specific device-implementation details are out of scope of this document.  

Purpose

The purpose of this document is to specify a standard interface between baseband or application processors and peripheral components. The SPMI reduces the time-to-market and design cost of mobile terminals by simplifying the interconnection of products from different manufacturers.