MIPI Demo Day Taipei 2026
21 October 2026
Education Sessions
In addition to the 15 member companies showcasing their innovative solutions, MIPI Demo Day Taipei will also deliver education presented by MIPI working group chairs and technical experts. These four sessions will diving into the latest developments and a look ahead at what's next for MIPI Display, A-PHY®, SWI3S®, and I3C®.
MIPI I3C Developments and New MIPI Specification for I/Os Over I3C Bridge
Presenters: Eyuel Zewdu Teferi, Aruni Nelson
10:30-11:15 a.m.
The first part of this presentation will provide an update on the latest developments in MIPI I3C®, covering advanced features such as HDR modes, multilane communication, target reset and I²C backward compatibility. It will also preview upcoming I3C v1.3 enhancements, including extended-length buses, multi-bus bridging, data protection and functional safety, highlighting the new applications they enable.
The second part of the presentation will introduce the forthcoming MIPI Specification for I/Os Over I3C Bridge. The new specification will standardize the bridging of I²C, SPI, UART and GPIO interfaces over MIPI I3C to reduce pin count, simplify system design, improve interoperability and extend the life of existing peripheral devices. This part will conclude with a look ahead at future deliverables from the MIPI I/O Bridges Working Group.
Presenters
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Eyuel Zewdu Teferi
Chair, MIPI I3C Working Group
Senior Staff Engineer, STMicroelectronicsEyuel Zewdu has been with STMicroelectronics since 2016 and is currently a senior staff engineer focusing on front-end digital design in STM’s MEMS sensor division. He has worked on projects defining, designing, implementing and validating communication interfaces for MEMS sensors. He earned his master's degree in electronics engineering from Politecnico di Torino. He is involved in both MIPI and JEDEC, and is currently the chair of the MIPI I3C and I3C Basic Ad Hoc working groups.
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Aruni Nelson
Chair, MIPI I/O Bridges Working Group
Principal Engineer, Intel CorporationAruni is a principal engineer at Intel Corporation, focused on high-speed and low-speed IO architecture and technology development, including debug software architecture. She has contributed to several industry standard specifications for next generation IO and debug technologies in multiple open standards forums. At MIPI, she chairs the Audio and I/O Bridges working groups, and leads the development of future debug specifications (e.g., Debug Over PCIe and Debug Over UCIe). Aruni also serves as the co-vice chair of the I3C Working Group. A gold medalist from Bangalore University in India, she holds a bachelor of engineering degree and brings broad expertise in developing technology products—from client PC and mobile devices, to medical imaging systems, and broadcasting switching and routing equipment.
MIPI A-PHY: New Compliance Program and Recent Specification Developments
Presenters: Edo Cohen, Tom Kopf
11:15 a.m.–12 p.m.
This presentation will provide the latest insights into the MIPI A-PHY® specification and the new MIPI A-PHY Compliance Program, which supports its continued industry adoption. The session will begin with an overview of the latest developments in MIPI’s high-speed, long-reach SerDes interface, including the release of A-PHY v2.1. It will highlight key advances across the A-PHY ecosystem, including growing industry adoption, strategic collaborations and emerging implementations. Next, the presentation will introduce the MIPI A-PHY Compliance Program, explaining its structure, processes and benefits. Attendees will learn how transmitter and receiver physical layer testing supports broader industry adoption and enables the reliable, scalable deployment of A-PHY-enabled devices in automotive architectures.
The presentation will conclude with an opportunity for attendees to engage with the speakers and discuss the latest developments in the A-PHY ecosystem.
Presenters
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Edo Cohen
Co-Chair, MIPI A-PHY Working Group
Vice Chair, MIPI Technical Steering Group
VP Automotive Products, Valens SemiconductorEdo has more than three decades of experience as a senior system engineer, with extensive expertise in system architecture, technical specifications and project implementation. Prior to joining Valens, Edo worked as a senior system architect at Intel Corporation, leading efforts in the wearables and IoT division. He has also held senior staff system engineer roles at Marvell Cellular Division, overseeing the company's cellular processor environment, as well as engineering managerial positions at Floware, Alvarion, and NAMS. Edo holds an MBA and a bachelor of science degree in electrical engineering from Tel Aviv University.
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Tom Kopf
Chair, MIPI A-PHY Compliance Advisory Group
COO, BitifEye GmbHAfter earning his MBA in 1999, Tom started at a PCB manufacturer as an account manager, and exiting as a manager, customer service, and deputy sales manager in 2012. After a two-year period as managing director, Stadtmarketing Böblingen e.V, Tom joined BitifEye Digital Test solution in 2015. He is currently leading the development of the A-PHY compliance program for MIPI Alliance.
Exploring MIPI SWI3S: Features, Applications, Tools and What's Next
Presenter: Aruni Nelson
1:15–2 p.m.
The MIPI SWI3S® v1.0 specification defines a low-latency, multi-drop audio interconnect with bandwidth up to 76 Mbps, supporting both single-ended and differential-low-voltage signaling modes through a unified protocol and software stack. Designed for applications ranging from compact wearables to automotive and robotics, the specification features low-voltage, embedded-clock signaling for reduced EMI/EMC and long cable support.
This presentation will cover SWI3S use cases, architecture, protocols, command flows and key improvements over existing audio interfaces. It will also provide an overview of supporting tools such as the SWI3S visualizer and a preview of the forthcoming Audio Bus Controller Interface (ABCI) and planned enhancements expected in SWI3S v1.1.
Presenter
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Aruni Nelson
Chair, MIPI Audio Working Group
Principal Engineer, Intel CorporationAruni is a principal engineer at Intel Corporation, focused on high-speed and low-speed IO architecture and technology development including debug software architecture. She has contributed to several industry standard specifications for next generation IO and debug technologies in multiple open standards forums. At MIPI, she chairs the Audio and IO Bridges working groups, and leads the development of future debug specifications (e.g., Debug Over PCIe and Debug Over UCIe). Aruni also serves as the co-vice chair of the I3C Working Group. A gold medalist from Bangalore University in India, she holds a bachelor of engineering degree and brings broad expertise in developing technology products from client PC and mobile devices, to medical imaging systems, and broadcasting switching and routing equipment.
What's Coming in MIPI DSI-2 v3.0 and DCS v3.0
Presenter: Samson Kim
2–2:45 p.m.
The upcoming releases of MIPI DSI-2™ v3.0 and MIPI DCS™ v3.0 will introduce new capabilities for next-generation displays, with a focus on low-power operation and emerging AR applications. This session presents the latest enhancements, including partial update in video mode, field-sequential display support, command mode peripheral sync synchronization, frame synchronized single wire peripheral to host (P2H) sideband interface, line group sequential support, multipoint support, and new DCS commands for partially refreshed displays.
The presentation will provide insight into the technical motivation, implementation considerations and benefits of these new features, explaining how they can enable more efficient display architectures in preparation for AR- and 6G-ready applications.
Presenter
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Samson Kim
Chair, MIPI Display Working Group
Senior Director of Engineering, Qualcomm Inc.
Samson Kim is a senior engineering leader with more than 25 years of experience in semiconductor and display technology. He currently serves as senior director of engineering at Qualcomm, leading a global team developing advanced display IP, high-speed display interfaces and industry standards across mobile, automotive, computing, IoT and XR platforms.


